Keynote Sessions
The keynote sessions cover a wide range of topical issues relevant to the future of the electronics industry. Keynote speeches will be presented by leaders from these companies:
- Lenovo
- Medtronic
- Intel Corporation
- Cadence Design Systems
- Microsoft
- STATS ChipPAC
- Amkor Technology
- Multitest Elektronische Systeme GmbH
KEYNOTE: CHALLENGES OF ULTRASLIM FORM FACTOR DEVICES
Dr. Tin-Lup Wong
Monday, May 20 • 6:30 pm
Distinguished Engineer and Executive Director, Product Group Technology, Lenovo
The last couple of years or so has brought revolutionary changes to the world of portable electronic devices. Tablets, ultrabooks, convertibles, sliders, hybrids — the proliferation of these new and unique device types has changed the paradigm as to what is meant by mobile form factor. These system types take thin and light to the extreme and magnify the challenges of design, manufacturability, quality and reliability.
The notebook computer was notorious for its high repair rates. A mobile device is vastly different from a computer that resides in a lab or on your desktop, as it is subject to knocks, shocks, drops, spills, chills, and whatever else the environment may bring. However, the past 10 years have brought consistent and dramatic improvements. The major PC manufacturers have recognized the importance of product quality in both customer satisfaction and managing warranty costs. This drove innovation to help protect the notebook computer from many of these largely accidental events and results have been significant. Nevertheless, the array of newly available product types turns this trend around and vastly steps up the challenge: ultra thin and light systems, many of which can flip, twist, contort, or even come apart! These are designed for incredibly flexible applications and a rapidly expanding market base of highly mobile users. Such devices will not sit on a desktop for too long, perhaps not at all.
Design, manufacturing and quality challenges are often significantly related. With these new systems, the challenges also increase exponentially as you might expect. Part tolerance and system assembly are critical. Gaps and seams that are not noticeable on a traditional notebook become significant issues on sleek new models. Extremely tight quarters for internal system components provide no margin for error. Routing of cables and antennas must also be just right. Extensive use of glass and adhesive materials becomes a fact of life.
Dr. Wong will discuss the challenges of ultraslim form factor devices and identify some of the considerations for overcoming them. His presentation will illuminate on:
- Optimizing strength in thin and light cover materials
- Mechanical fit and finish
- Glass resistance to breakage
- Hinge strength and durability
- Cable routing
- Connector integrity
- Touch screen design challenges
- Planarity considerations for system boards & SMT
- Polymer battery performance and durability
Keynote: Challenges and Trends in Medical Electronics
Derrill Wolkins
Monday, May 20 • 7:15 pm
Director of Product Development, Medtronic
Medical electronics has long been a small niche within the electronics industry. Strict regulatory environments, low volumes and extremely high quality standards make for a unique set of challenges for those who wish to participate.
At the same time, medical electronics is emerging as one of the most exciting and growing sectors of th
high tech industry with many companies around the world rushing to join in along with the long-established players. The human body has a complex electrical system and, to date, we have tapped only a small
portion of the near endless possibilities for the application of devices to improve people’s lives. Wolkins will share a brief history of the industry, from its origins in a garage repair shop in the 1950s to the rapidly growing multi-billion dollar industry that it is today. He will touch on the unique technical challenges of the industry and discuss the new product trends and global economic forces that are promising to bring significant changes and propel growth including:
- Emerging new product applications
- Technology challenges and trends
- The RoHS dilemma
- Global regulatory complexities
- The emergence of markets in the developing world (and their unique needs)
- Balancing low cost and high quality – can we have both?
- Economic pressures
Keynote:Consumer and Market Trends in PCs
Tuesday, May 21 • 12:00 pm
Zane A. Ball
Vice President, Intel Architecture Group
General Manager, Global Ecosystem Development, PC Client Group
Even in this world gone mobile, there’s still a growing appetite for one type of stationary PC: the “all-in-one” PC or AIO. Sales of AIOs have been climbing by double digits in the last few years, and gaining more and more shelf space next to conventional desktop tower PCs at retail stores.
Zane Ball, general manager of Desktop Client Platforms at Intel Corporation, will discuss this exciting new trend as the keynote speaker at the IPC Electronic System Technologies Conference and Exhibition (IPC ESTC). His pace-setting and industry-driving presentation will concentrate on past and current trends in client PCs. He will also share his predictions on the opportunities ahead and new concepts centered on AIOs and more.
“AIOs are one of the fastest growing categories of PCs,” says Ball. An estimated 16.4 million AIOs are expected to sell this year, a 20 percent increase from 2011, according to research firm IHS. While total sales remain a fraction of the 132.3 million traditional desktop PCs forecast to sell this year, AIO sales growth is attracting attention.
All-in-ones integrate computer components with the display and rely on a single power plug. That's in contrast to traditional desktop PCs with a separate tower and monitor that connect via cable, with each requiring its own power source. Industry experts say the recent rise in demand for AIOs is also being driven by significant cost savings from manufacturing efficiencies and new, more elegant designs … not to mention, they are just more fun to use.
On the horizon: a new wave of "adaptive" large form factor touchscreen AIOs from a number of manufacturers. As seen at the September 2012 Intel Developer Forum in San Francisco, these giant, tablet-like computers have built-in batteries and can be moved from room to room and laid flat on a table, allowing multiple people to use the touch interface.
"Imagine a group of friends playing electronic versions of traditional board games or building a photo album or scrapbook together," says Intel’s Ball. "These larger screen, multi-user experiences can really bring the family together.”
Consumers are seeing a wave of new AIO designs from a host of familiar PC manufacturers. Even companies better known for making TVs and home appliances are jumping in with their own stylish AIO designs. Imagine the possibilities when gesture and voice control are incorporated into AIO in the near future. PC makers are expected to expand AIO product lines in the upcoming months.
Not only are consumers being attracted by new, stylish designs, they're also benefiting from manufacturing, inventory, and shipping costs savings, as AIOs require only one box rather than the two needed to package a monitor and tower.
New distribution efforts to bring components and system design specs to resellers could help smaller computer makers around the world bring their own AIOs to market quickly and revitalize their desktop businesses.
Work has been in progress with board manufacturers and original design manufacturers to develop a standard for all-in-ones. Experts explain that while it would have taken nearly one hour to build a system in the past, with new integration and manufacturing specs the time is now less than 20 minutes. This may, in part, account for the 300 percent increase in AIO channel sales over this same time last year. Overseas markets have certainly fueled much of that growth, not only in China and Latin America, but also in emerging markets such as Russia and India.
Join your colleagues for this insightful look into the trends and opportunities in the PC market.
Keynote: Convergence of the EDA Industry
Tuesday, May 21 • 6:30 pm
Dr. An-Yu Kuo
Senior Architect, Cadence Design Systems
The inception of the EDA and wafer foundry industries in the early ‘80s revolutionized the business and technology landscapes of electronics design and manufacturing. As a result of these two new industries, hundreds if not thousands of new fabless companies were born. For nearly two decades, the EDA industry had been dynamic, volatile and unpredictable. But for the past 10 years, the industry, while still dynamic, is riding a trend of convergence. Based on the convergence trends he observed, Dr. Kuo will elaborate on answers to these questions:
- Is the EDA industry doomed to disappear?
- Does it still make sense for investors and entrepreneurs to jump into the EDA industry?
- Will EDA companies consolidate to just two companies?
- Will off-shoring of EDA developments increase or decrease?
In addition to sharing his business perspectives, Dr. Kuo will provide insights into:
- How far will multi-physics simulations migrate into EDA tools?
- After parallel and multi-core computing, will/should EDA companies go for cloud computing?
KEYNOTE: Designing for the Future
Raj Master
tuesday, May 21 • 7:15 pm
General Manager, IC Packaging, SiOps, Quality and Reliability, Microsoft
Raj Master will examine recent Xbox 360 and Kinect product launches through the lens of DfX, a design methodology that he embraces. He maintains that DfX which includes design for manufacturability, assembly, test, quality and reliability, among others, is critical to successful product delivery. He will articulate on the importance of hardware and software working together to enable state-of-the-art devices, believing in raw technologies in their early stages, building demos, and creating something that no one ever shipped before, something that costs a lot on paper, and is clearly not just a consumer-electronic device.
How do you pick technology and put soul into it?
How can you effectively work closely with content developers — the creators — to formulate a compelling story about why this technology brings new experiences to the market?
In a presentation that will have you thinking outside the box, Master will shed light on answers to these questions and provide insights into designing for the future.
Keynote: Trends in the Packaging & Integration of Mobile Platforms
Dr. Raj Pendse
Wednesday, May 22 • 12:00 pm
Vice President and Chief Marketing Officer, STATS ChipPAC
The human quest to communicate at anytime and from anywhere has led to the proliferation of myriad gadgets that provide not only the means to communicate but are virtually an extension of who we are and what we do. The result is the concentration of computing power into small form factors with localized processing densities perhaps second only to the human brain.
Along with this trend come unique challenges for the semiconductor and packaging technologies that are at the heart of such devices. In particular, several new trends are evident in the underlying packaging technology:
- The traditional approach of a substrate based package comprising a die attached to a lead frame or laminate substrate is giving way to packaging at the wafer or silicon level, with interconnection schemes changing from wire bond to flip chip and through Si vias (TSVs) and I/O densities increasing rapidly with finer Si nodes.
- The seemingly independent trajectories of integration at the die level in the form of system on a chip (SoC) as well as integration at the package level in the form of system in a package (SiP) are converging into a superset of 3-D packaging which relies on a judicious blending of Si and packaging technologies.
- Thermal management is shifting from a “cure” approach, i.e. resorting to heat removal schemes to cool the chip, to a “prevention” approach, i.e. minimizing power dissipation in the first place through elimination of package parasitics.
Manufacturing business models are changing as well, from captive to open systems with flexibility of access to manufacturing services, namely, foundries for Si fabrication and OSATs for packaging. - Last but not the least, there is an increasing emergence of ecosystem-driven hardware solutions, with software powerhouses starting to dominate hardware design and manufacturing, e.g. Apple, Google , Microsoft, Amazon to name a few.
Dr. Pendse will review the transforming landscape of mobile platform packaging and how the leading packaging service providers are gearing up to meet the technology and business challenges.
KEYNOTE: System Integration Challenges in Packaging
Dr. Choon Lee
wednesday, May 22 • 6:30 pm
Senior Vice President, Amkor Technology
Innovation is the force that drives electronics packaging. The ability for a package to deliver greater functionality in the most efficient manner is the key to exceptional package design. Over the last few years, rival packaging technologies have converged. System-on-chip (SoC) and system-in-package (SiP) technologies have come to a strategic inflection point. The SiP and SoC convergence has led to the evolution of micro-EMS, a module level packaging which integrates the functional aspects of both SiP and SoC.
Dr. Lee will reveal how SiP, SoC and micro-EMS packaging types have evolved over time as well as the strengths and weaknesses of each. Common applications and uses for each of the packaging technologies within the major market segments will be discussed. This is a very rare opportunity to hear and learn from one of the world’s foremost experts in packaging technology and an innovator in the field.
KEYNOTE: 3D Technology Fusion – is KGD good enough?
Why new test strategies are needed
James Quinn
wednesday, May 22 • 7:15 pm
Vice President of Sales and Marketing, Multitest Elektronische Systeme GmbH
There are major trends for reduced form factors and increased functionality of ICs as well as enhanced requirements regarding electrical performance and power dissipation. These trends drive TSV packaging and 3-D IC solutions. Stacking dies bear a much higher risk for failure than single die technologies: Failures may happen in the dies themselves, but additionally in the interposers, laminations and connections. Bad parts in the stack will corrupt good ones. The worst-case scenario adds a cost-intensive component, such as memory on a stack, which is dysfunctional. The known good die (KGD) concept can only partly solve this. Advanced packaging processes require not only total reliability of the overall supply chain, but also advanced models to reduce the risk of unprofitable output caused by the packaging process itself.
Solution:
In traditional semiconductor production, component test (for KGD) and final test for ultimate functional QA before shipment are sufficient to ensure quality and cost-efficiency. Advanced packaging methods such as 3-D go beyond this.
In his presentation, Quinn will discuss ways for a distributed test flow, which compares the cost of test with the cost of non-testing, with special references to the packaging process. He will also highlight the opportunities and challenges of distributed test strategies and analyze the best models for this test distribution and the special equipment requirements.